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NXP Semiconductors /LPC43xx /CCU1 /CLK_SPI_CFG

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Interpret as CLK_SPI_CFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)RUN 0 (AUTO_IS_DISABLED_)AUTO 0 (WAKE_UP_IS_DISABLED_)WAKEUP 0RESERVED

WAKEUP=WAKE_UP_IS_DISABLED_, RUN=DISABLED, AUTO=AUTO_IS_DISABLED_

Description

CLK_SPI clock configuration register

Fields

RUN

Run enable

0 (DISABLED): Clock is disabled.

1 (ENABLED): Clock is enabled.
AUTO

Auto (AHB disable mechanism) enable

0 (AUTO_IS_DISABLED_): Auto is disabled.

1 (AUTO_IS_ENABLED_): Auto is enabled.
WAKEUP

Wake-up mechanism enable

0 (WAKE_UP_IS_DISABLED_): Wake-up is disabled.

1 (WAKE_UP_IS_ENABLED_): Wake-up is enabled.
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data